:::
| Entry Year | 100 |
|---|---|
| Paper title (chapter) | High Performance Buffered X-Architecture Zero-Skew Clock Tree Construction with Via Delay Consideration |
| Name of journal | International Journal of Innovative Computing, Information and Control |
| Date of publication | 2011-09 |
| number of chapters | 7 |
| Issue No. | 9 |
| 起頁 | 5145 |
| 迄頁 | 5161 |
| Total number of pages | 17 |
| Name of author (Chinese) | Chia-Chun Tsai |
| Name of author (English) | Chia-Chun Tsai |
| Authors | 第一作者 |
| Language used | 外文 |
