:::
| Entry Year | 100 |
|---|---|
| Paper title (chapter) | Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield Improvement |
| Name of journal | IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences |
| Date of publication | 2011-02 |
| 起頁 | 706 |
| 迄頁 | 716 |
| Total number of pages | 11 |
| Name of author (Chinese) | Chia-Chun Tsai |
| Name of author (English) | Chia-Chun Tsai |
| Authors | 第一作者 |
| Language used | 外文 |
